|
Cortex M4 |
e200z0 |
|
|
Memory Management/Protection Unit |
Y |
N |
|
Signal processing extension |
Y |
N |
|
Pipeline |
3-stage |
4-stage |
|
Branch unit processor |
Not explicit |
Y |
|
Integer divide cycles |
2 – 12 cycles |
5 – 34 cycles |
|
Endianness |
Little |
Big |
