PhysDesignRules:2410 - This design is using one or more 9K Block RAMs (RAMB8BWER). 9K Block RAM initialization data, both user defined and default, may be incorrect and should not be used. For more information, please reference Xilinx Answer Record 39999.
Other Map Command Line Options
-convert_bram8
...
Other Bitgen Command Line Options
-g INIT_9K:Yes
