گروه فنی مهندسی آرکام

module Div20x (rst, clk, cet, cep, count, tc);

parameter size = 5;

parameter length = 20;

input rst;

input clk;

input cet;

input cep;

output [size-1:0] count;

output tc;

reg [size-1:0] count;

wire tc;

always @ (posedge clk or posedge rst)

  if (rst)

    count <= {size{1'b0}};

  else

  if (cet && cep)

    begin

      if (count == length-1)

        count <= {size{1'b0}};

      else

        count <= count + 1'b1;

    end

assign tc = (cet && (count == length-1));

endmodule