Cortex M4 |
e200z0 |
|
Memory Management/Protection Unit |
Y |
N |
Signal processing extension |
Y |
N |
Pipeline |
3-stage |
4-stage |
Branch unit processor |
Not explicit |
Y |
Integer divide cycles |
2 – 12 cycles |
5 – 34 cycles |
Endianness |
Little |
Big |
Interrupt controller |
Internal |
External |
Jump-to-Isr latency |
3 cycles |
Code dependant; several cycles |
Debug Interfaces |
JTAG, J-Link |
JTAG |
Number of core registers |
13 + SP, LR, PC (16 total) |
32 + SP, CR, LR, CTR |
Instruction set supported |
Thumb 16-bit instructions |
VLE 16-bit instructions |
چگونگی چینش بایت های داده در آدرس های حافظه، مسئله ای که من را یک روز گذاشت سر کار...
/* C function to change endianness for byte swap in an unsigned 32-bit integer */
uint32_t ChangeEndianness(uint32_t value)
{
uint32_t result = 0;
result |= (value & 0x000000FF) << 24;
result |= (value & 0x0000FF00) << 8;
result |= (value & 0x00FF0000) >> 8;
result |= (value & 0xFF000000) >> 24;
return result;
}