- Launch MaxPlus II 10.2 Baseline.
- Open the text editor (MaxPlus II -> Text Editor), or open an existing project (File -> Open).
- Enter your VHDL code.
- Save it with the extension .vhd (or *.v).
- Set the project to the current file: File -> Project -> Set Project to Current File.
- Choose the target device (Assign -> Device).
- Set up the optimizer. Select Assign -> Global Project Logic Synthesis….
- Click on the Compiler icon, then on Start.
- If no errors are detected, you are fine!
- Open the report (.rpt) file.
- Open the waveform editor (MaxPlus II -> Waveform Editor).
- Inside the window, press the right mouse button.
- Select Enter Nodes from SNF….
- Click on List, then on =>, and finally on OK.
- Select File -> End Time and type 1us.
- Select Options -> Grid Size and type 50 ns.
- Select View -> Fit in Window.
- Set up the input signals.
- Save your waveforms with the extension .scf.
- Click on the simulator icon and on Start.