entity addr_gen is
generic
(
C_MAX_DEPTH : integer := 1024 ;
RST_VALUE : std_logic_vector(31 downto 0) := (others=> '0');
RST_INC : integer := 0 -- offset
);
port
(
clk : in std_logic;
rst : in std_logic;
en : in std_logic;
load : in std_logic;
load_value : in std_logic_vector (31 downto 0) := (others => '0');
addr_out : out std_logic_vector (31 downto 0)
);
end addr_gen;
entity PulseDurationDetector is
Generic
(
g_CLK_FREQ_MHZ : integer := 100;
g_OUT1_THR_LOW_US : integer := 9;
g_OUT1_THR_HIGH_US : integer := 11;
g_OUT2_THR_LOW_US : integer := 19;
g_OUT2_THR_HIGH_US : integer := 21;
g_OUT_DURATION_US : integer := 2
);
Port
(
i_CLK : in std_logic;
i_Pulse : in std_logic;
o_Out1 : out std_logic := '0';
o_Out2 : out std_logic := '0'
);
end PulseDurationDetector;
Library IEEE;
Use IEEE.std_logic_1164.All;
Use IEEE.std_logic_arith.All;
Use IEEE.std_logic_unsigned.All;
Entity rst_gen is
Port(
clk : in std_logic;
reset : out std_logic
);
BUFGMUX_VIRTEX4_Inst : BUFGMUX_VIRTEX4
port map
(
O => clk_muxout, --Clock MUX output
I0 => clk_wr, --Clock0 input
I1 => clk_rd, --Clock1 input
S => sram_rd_en_i --Clock select input
);
type m_state_t is (idle_st, write_st, read_st, halt_st);
signal m_state : m_state_t;
data_width : integer := 36;
...
sram_dout : out std_logic_vector(data_width - 1 downto 0);
...
SRAM_DQ : inout std_logic_vector(data_width - 1 downto 0);
...
process (clk)
begin
if rising_edge(clk) then
sram_din_r1 <= sram_din;
sram_din_r3 <= sram_din_r1 ;
end if;
end process;
...
ADC1_DOUT_P : in std_logic_vector(11 downto 0);
ADC1_DOUT_N : in std_logic_vector(11 downto 0);
...
Loop1: for i in 0 to 11 generate
IBUFDS_inst1 : IBUFDS
generic map
(
CAPACITANCE => "DONT_CARE",
DIFF_TERM => TRUE
IBUF_DELAY_VALUE => "0
IFD_DELAY_VALUE => "AUTO
IOSTANDARD => "DEFAULT"
)
architecture behavioral of top is
...
attribute keep : string;
attribute keep of MyClk : signal is "true";
attribute keep of MyData : signal is "true";
...
begin
...
clk_i : in std_logic;
clk_o: out std_logic;
...
signal clk : std_logic := '0';
...
clk_o <= clk;
...
process (clk)
begin
if ( rising_edge (clk) ) then
...
end if;
end process;
...
-- IBUFG: Global Clock Buffer (sourced by an external pin)
IBUFG_Inst : IBUFG
generic map ( IOSTANDARD => "default")
port map (o => clk, i => clk_i );
#define led_live PORTD.6
...
unsigned int cntr = 0; // timer divider
...
interrupt [TIM0_OVF] void timer0_ovf_isr(void)
{
// Place your code here
// 10 ms
TCNT0 = 0x64;
cntr = cntr + 10;
if (cntr == 500)
{
led_live = ~led_live;
cntr = 0;
}
}
typedef union
{
unsigned char byte;
struct
{
unsigned char error_code : 3;
unsigned char command : 2;
unsigned char enable : 1;
unsigned char error : 1;
unsigned char ready : 1;
}bits;
}register_type
...
registerType *pReg = (registerType*)0x00004000; // XXX_REGISTER_MEMORY
pReg->bits.enable = 0;
pReg->bits.error_code = 7;
...
pReg->byte = 0x55
In C#, the long type is 64 bits, while in Microsoft C++, it is 32 bits.!!!
typedef struct Flight
{
enum { PASSENGER, CARGO } type;
union
{
int npassengers;
double tonnages
} cargo;
} Flight;
...
Flight flights[ 1000 ];
...
flights [ 42 ].type = PASSENGER;
flights [ 42 ].cargo.npassengers = 150;
...
flights [ 20 ].type = CARGO;
flights [ 20 ].cargo.tonnages = 356.78;
منظور این که باید به نحوی برنامه نوشت که کمترین فضا را اشغال کند!!!
input CLK_50MHz;
...
wire CLK_25MHz;
...
clock_divider clk_div(.clk_in(CLK_50MHz), .clk_out(CLK_25MHz));
...
...
module clock_divider(clk_in, clk_out);
input clk_in;
output clk_out;
reg clk_out = 0;
always @(posedge clk_in)
clk_out <= ~clk_out;
endmodule
The System Tick Timer (SYSTICK Timer) is a simple 24-bit down counter. The timer can be started and configured with an automatic reload value. If the timer is running and it's IRQ is enabled, it generates periodic interrupts. The System Tick Timer can use the internal clock (FCLK, the free running clock signal on the Cortex-M processor) or the external clock (the STCLK signal on the Cortex-M processor). The System Tick Timer is often used by the RTOS.
# CLOCK PLACEMENT RULES must not be followed...
NET "CLK" CLOCK_DEDICATED_ROUTE = FALSE;
